Overload protection device for emitter-follower line driver

ABSTRACT

The invention provides a two-level control for protecting an emitter-follower driver from passing excessive current. The first level is that of enabling a protection circuit provided by the invention whenever the emitter-follower draws current in response to the &#39;&#39;&#39;&#39;on&#39;&#39;&#39;&#39; level of a logic input signal. The second state, or level, of protection occurs when a fault or overload condition occurs which causes the voltage level at the emitter to fall below a predetermined level which could sense an overload or fault condition. If this occurs, the protection circuit of the invention becomes operative and shunts all of the current away from the driver.

nite Stats iet A [72] inventor John R. Andrews, Jr.

Framinglmm, Mm. I21] Appl. No. 872,821 [22] Filed 011.31, 1969 [45)Patented Aug. 10, i971 [73] Assignee Honeywell Inc.

Minneapolis, Minn.

[54] OVERLOAD PROTEUION DEVICE FOR EMHTTER-FOLLOWER LINE DRIVER 10Claims, 6 Drawing Figs.

[52] U.S.Cl 317/16, 3l7/31, 3 l7/33, 307/202 [5 l] int. Cl. 02h 3/08,HOZh 7/20 50] Field oi Search 307/202, 214. 254-, 317/31, 33, I6

[56] Refer-exam Cited UNITED STATES PATENTS 3,163,829 l2/l964 Ladd317/31 X 3,447,035 5/1969 Boykin ABSTRACT: The invention provides atwo-level control for protecting an emitter-follower driver from passingexcessive current. The first level is that of enabling a protectioncircuit provided by the invention whenever the emitter-follower drawscurrent in response to the on" level of a logic input signal. The secondstate, or level, of protection occurs when a fault or overload conditionoccurs which causes the voltage level at the emitter to fall below apredetermined level which could sense an overload 0r fault condition. Ifthis occurs, the protection circuit of the invention becomes operativeand shunts all of the current away from the driver.

PATENTED AUG! 0 ml LOAD EMITTER" FOLLOWER DRIVER Fig. 1.

PROTECTION OUTPUT STAGE ISOLATION MEANS BIAS AND ENABLING MEANS INPUT ISIGNAL.

lxvlixwm JOHN R. ANDRE W8, JR. flay M AT'H )RNIIY IIFID EIP Fig. 2.

OVERLOAD PROTECTION DEVICE FOR EMITTER- FOLLOWER LINE DRIVER Thisinvention relates to overload protection devices and more particularly,to a device of this type which is used to prevent excessive current frompassing through an emitter-follower line driver. In furtherparticularity, the invention provides a two-level protection techniquewhereby a protection output stage is first enabled after current ispassing through the line driver to be protected and then, at the secondlevel, cuts off current through the driver upon the sensing of a faultcondition, the excessive current due to the fault being passed throughthe protection stage.

Many types of protection devices have been provided in the prior art,some specifically related to the protection of line drivers for logicsystems. In further particularity, there have been integrated circuitsprovided which cut off an emitter-follower driver upon occurrence of afault of overload condition.

The known protection devices of the above-mentioned type have hadseveral disabilities. Firstly, they tend to be overly complex. Secondly,they do not provide for several situations which, after carefulanalysis, appear to be vitally important in the accomplishment ofeffective and reliable overload protection.

One thing that known systems have not accomplished effectively is theseparation of preparing for protection, from the actual function ofprotection. More specifically, the prior art has not provided a simpleand effective means of enabling the protection circuit only after theproper logical conditions have occurred, but before the actual fault hasoccurred.

Another disability in known protection systems is that they occasionallysupply current to a load when the logic of the system shows that suchcurrent should not be supplied.

Accordingly, one of the objects of the present invention is to provide aprotection device for a line driver which effectively and efficientlytakes into consideration all of the possible states of three circuitvariables namely: the state of the logic input signal; the state of theline driver; and the state of the fault condition. More specifically, itis an object of the invention to provide an integrated circuit whicheffectively and efficiently provides a protection output stage for anemitter-follower driver and bias and enabling means for controlling saidprotection output stage to cut off the line driver for the properconditions.

The novel features which are believed to be characteristic of theinvention, both as to its organization and method of operation, togetherwith further objects and advantages thereof, will be better understoodfrom the following description considered in connection with theaccompanying drawings in which several embodiments of the invention areillustrated by way of examples. It is to be expressly understood,however, that the drawings are for the purpose of illustration anddescription only and are not intended as a definition of the limits ofthe invention.

FIG. 1 is a block diagram of a protection device for a line driveraccording to the invention;

FIG. la is a logic diagram or truth table depicting the variousconditions of a logic input signal, I, a fault condition, F, the currentcondition of the driver, D, the resulting enabling state for theprotection output stage, E, and the state of the protection controlsignal P;

FIG. 2 is a schematic diagram of one embodiment of the invention;

FIG. 2a is a schematic diagram of an alternate form for circuit 220shown in FIG. 2; FIG. 2b is a schematic diagram showing an alternateintegrated circuit form for the diodes used in embodiments of theinvention; and

FIG. 20 shows an integrated circuit transistor form suitable forcapacitor C211.

Referring now to FIG. I, it will be noted that an input signal referredto as I is applied to isolation means 100 which produces an outputsignal I corresponding to the logical complement of signal I'. Isolationmeans 100 further includes a noninverting circuit which passes a signalIa, corresponding directly to I, to bias and enabling means 200.Enabling means 200 produces an output signal E which will be morespecifically defined below. Signal E is applied to protection outputstage 400 which produces a control signal P applied to the input of linedriver 300 which also receives signal I. The output circuit of stage 400is connected to the output of driver 300, where output signal Dcorresponds to the condition of the driver as will be explained. Theline connects to a load 500 which may exist in many types of utilizationdevices not forming part of the present disclosure. A dotted line isshown bearing the symbol F to represent a possible fault condition onthe line. The significance of, and the relationship among, signals 1, F,D, E and P will be considered with reference to both FIGS. 1 and la. 7

Eight possible operating conditions may exist with reference to thestates of signal I, condition F, and signal condition D. Starting fromrow (I) of FIG. 1a, we note that if all signals are off or O, the systemis in a condition where the logic input signal I represents an off stateso that no current is to be supplied to load 500. It is assumed that inthis case there is no fault, but if there were, as in case (3), noaction would be required. Thus cases (1) and (3) are the same except forthe condition of the fault. In case (2), only the driver output signal Dis purported to be on. This case is not permitted because, bydefinition, the driver is not permitted to conduct current when theinput signal I=0. In case (4) a similar nonpermissible case is expressedwhere both the fault condition F and the driver are on. Since cases (2)and (4) cannot occur, no values are given for E and P. Case (5)represents a situation which many protection systems do not properlyaccount for, where the input signal is on but the driver signal D isstill 0. If the protection circuit were enabled under this condition,current would be supplied from the protection output stage which woulddisable the proper functioning of the line driver. Therefore, case (5)is an important situation to consider with respect to the properfunctioning of the present invention.

In case (6) both the driver and the logical input signal are but noprotection is yet required because a fault F is not present. In case (7)we have the situation of case (5) where the logical input signal is on,but the driver is not. Care must thus be taken for both cases (5) and(7) to prevent enablingtb f the protection device. It may be noted that,since the driver is not conducting current in this case, no protectionis really required. In case (8) we have the only situation whereprotection is actually required. Here the driver has already respondedto the input signal on state and a fault F has occurred. Thus enablingmeans 200 functions to produce the proper level of signal E, andprotection output stage 400 functions to then cut off driver 300 andshunt the excessive fault current away from the driver.

Reference is now made to FIG. 2 where a transistor T101 is shown havinga collector electrode providing an inverted output signal I,corresponding to the complement of the input signal I'. A standardpullup resistor R101 connects the collector of T101 to a suitable pullupvoltage represented as +V. The emitter of transistor T101 is connectedto a resistor R103 which provides an output signal Ia in phase with theinput signal 1'. Signal I is applied to a first transistor T301 incircuit 300 having a collector pullup resistor R301 receiving +V, and anemitter resistor R303 which is grounded. The emitter of transistor T301is connected to the base of a second transistor T302 having a collectorpullup resistor R302 also receiving +V. Transistor T302 provides theemitter-follower output stage for driving the line, and thus the emitterof this transistor provides output signal DQLoad 500 is shown asincluding a resistor R501 to represent a typical resistive load.

In protection circuit 400, a transistor T401 is shown which has itsemitter connected to the emitter of T302. Circuit 400 also includes adiode D401 having its cathode connected to the collector of transistorT401 and its anode connected to the base of T301. The base of T401receives signal E, representing on," and therefore, protection circuit400 may be enabled the enable function mentioned above. Signal E isprovided by circuit 200 by means of a circuit therein referenced as 220,one specific form of which is shown in FIG. 2 and an alternate form ofwhich is shown in FIG. 2a.

Signal I, derived through transistor T101, is applied to a circuit 210forming part of means 200. Specifically, a semiconductor device such astransistor T211 receives a signal I at its base. The emitter of T211 isconnected to ground and the collector thereof is connected throughcapacitor C211 to ground. An integrated circuit form of capacitor C211is shown in FIG. 2c c. The collector of T211 is also applied to theinput of circuit 220 which is shown, in the case of FIG. 2, to include asemiconductor device such as transistor T221 having its collectorconnected through resistor R221 to potential +V, and its emitterconnected through resistor R223 to ground. The emitter of T221 providessignal E which is applied to circuit 400.

The base of transistor T221 is connected to ground through a resistorR225 and to the cathode of a semiconductor device such as diode D221,the anode of which is connected through resistor R227 to potential +V.

The operation of the circuit of FIG. 2 will be considered with referencebeing'made again to FIG. 1a. When input signal I is off" correspondingto the on level of complementary input signal I, applied to the basetransistor T101, T101 is caused to conduct. This means that the offlevel of signal I approaches ground potential and thus cuts off theconduction of transistor T301 in circuit 300. This action causes thecutting off of transistor T302 so that no current is supplied to load500, and the system is in state l of the FIG. la.

When signal I is off, signal I is on, because the conducting state oftransistor T101 causes the potential across resistor R103 to rise. Thisvoltage increase is effective to turn on transistor T211 and, after adelay which will be further explained below, the potential of the baseof transistor T221 is lowered. The result of this action is thattransistor T221 is cut off and, therefore, the signal E is disabled sothat transistor T401, in protection circuit 400, cannot be caused toconduct by the occurrence of a fault. This corresponds to state (3) ofFIG. la.

The other two states (2) and (4) of FIG. 1a have been previously notedto be impossible since they imply that driver signal D is on eventhoughinput signal I is off.".

The next series of states to be considered with specific reference toFIG. 2, are (5) through (8) of FIG. 1a. In these cases signal I assumedits on or high level. This means that signal I must represent logical 0.When signal I assumes a relatively high positive level at the collectorof transistor T101, it causes transistor T301 to conduct which, in turn,causes transistor T302 to conduct causing line driver signal D to assumeits on" condition.

When signal I is applied to the base of T301, signal I is applied to thebase of transistor T211. It is at this time that the action of capacitorC211 becomes important. The delay in charging capacitor C211 to a highlevel in response to the cutoff of transistor T211 delays the driving oftransistor T221 into conduction. Thus, the enable signal E which resultstherefrom cannot occur before signal D is on." This then preventstheenabling in case (5) of signal E before signal D is llonii At this pointit is significant to consider how the on or enabling level of signal Eshould be selected. The purpose of the on state of signal E is toforward-bias transistor T401 only in the fault-occurring sense. That is,potential E when on is not sufficient to cause conduction of transistorT401 unless a fault condition has occurred which has pulled the voltagelevel at the emitter of T302 down to the danger level.

Thus, from a logical point of view, transistor T401 is not permitted topass current unless, firstly, signal D is on, and, secondly, a fault ispresent.

If this occurs, the system has entered case (8) of FIG. 1a. It is onlyin this case that enable signal E is on, and protection circuit 400becomes operative.

When protection circuit 400 becomes operative, in this manner,transistor T401 conducts and the collector thereof assumes a level whichis slightly higher than the level of the fault. This condition isassumed to correspond to the "on" state of signal P appearing at thecollector of T401. Resistors R301 and R303 are selected such thattransistor T301 is cut off when signal P is on. After T301 is cut off inthis manner T302 is then also cut off to terminate the passing ofcurrent to the line.

Transistor T401 cannot be overloaded because it receives its collectorcurrent through resistor R101 selected to be high enough to provide thenecessary protection. From a logic point of view, the function of thecircuit of FIG. 2 is simply to enable the protection circuit only afterthe line driver is conducting and to cause the protective operation ofcircuit 400 only after the fault condition occurs.

An alternate circuit which may be used in the place of circuit 220 inFIG. 2 is shown in FIG. 2a. In this case the enabling signal is derivedfrom a network which includes a resistor R229 supplying +V potential tothe anode of a diode D221 having its cathode connected to the anode of adiode D223. The cathode of diode D223 provides the output signal E andis connected to the anode of diode D224, the cathode of which connectsto the anode of diode D225. The cathode of D225 connects to the anode ofdiode D226, the cathode of which is connected to ground. The function ofthis alternative circuit is simply to transform the signal derived fromthe collector of transistor T211 into a two-state signal where, whentransistor T211 is on" E is approximately at ground level; whereas whentransistor T211 is off" E assumes the predetermined bias level definedabove.

Although diodes have been shown in conventional form, in actualintegrated circuit practice they may appear as shown in FIG. 2b. In thiscase, by connecting the base and collector electrodes together only asingle diode element is left. Capacitor C211 is shown in integratedcircuit form in FIG. 2c, where the collector and emitter electrodes areconnected and the base is connected to ground. Capacitance is derivedfrom the electrode junctions in a now well-known manner.

It may be desired to provide a more direct association between signal Dand signal E, avoiding the use of a delay such as capacitor C211. Inthis case a coupling may be made between the collector of transistorT302 to the base of transistor T211, removing any other connectionthereto as shown in FIG. 2. This coupling should be made through avoltage-dropping circuit, such as a series of diodes, so that whentransistor T302 is conducting, and pulls the collector thereof to alower level, there is insufficient voltage to cause the conduction oftransistor T211. This results in the enabling of transistor T401. Sincethe collector of transistor T302 can only assume this reduced voltagestate after the conduction has begun, the desired relationship between Dand E is obtained for this condition. When signal D is in the of state,the voltage at the collector of T302 assumes a level corresponding to+V, which is then sufficient to cause the conduction of transistor T21 1and thus disables signal E.

One specific technique in detailed circuitry has been explained to showan operating embodiment of the invention. It cannot be definitely statedthat this is the preferred embodiment of the invention in view of themany different environments in which a line driver must operate.Accordingly, preference in the practice of the invention must be definedin terms of FIG. 1a where logical conditions are clearly set forth whichmust be satisfied for the proper operation of the invention.

I claim:

1 An overload protection device for an emitter-follower drivercomprising: a protection output stage having its output coupled to theoutput of the emitter-follower driver, said output stage having acontrol circuit coupled to the input of said emitter-follower driver andhaving an input circuit adapted to receive a bias and enabling signal;bias and enabling means for lga receiving an input signal and producingan enabling signal having a predetermined bias level; and means forisolating the input circuit of said emitter-follower driver from saidbias and enabling means; said bias and enabling means including circuitsfor establishing said predetermined bias level and for enabling saidprotection output stage to pass current only when said driver is passingcurrent in response to an input signal having an on level and when anoverload condition is sensed by said protection output circuit whichcauses the voltage at the output of said driver to fall below saidpredetermined bias level.

2. In a logic driver system wherein anon level of an input signal isemployed to cause conduction of an emitter-follower line driver therebypassing current to a load, and the off level of the input signal isemployed to cut off conduction of said line driver, an overloadprotection circuit for cutting off current conduction through said linedriver only after current is passed through said line driver and thevoltage across said load falls below a predetermined fault level, saidprotection circuit comprising transistor means for receiving said inputsignal and producing a bias-enabling signal having an enabling levelwhen said input signal is on" and a disabling level when said inputsignal is off; and second means having an input circuit for receivingsaid bias-enabling signal, an output circuit coupled to said load, and acontrol circuit coupled to said line driver; the enabling level of saidbias-enabling signal being selected to exceed said fault level by anamount sufficient to forward bias said second means upon occurrence of afault and said control circuit being operative to terminate conductionthrough said line driver.

3. An improved line driver comprising: a logic signal input circuit; anoutput stage for providing a low impedance path for current flow to aload in response to an on condition of said logic signal; an enablingdevice including circuits for establishing an enabling signal having apredetermined bias level only when said output stage is supplyingcurrent to said load; and a protection device responsive to saidenabling signal for shunting excessive current away from said outputstage upon occurrence of a fault which pulls the voltage across saidload to a level below said predetermined bias level.

4. In combination: transistor means for receiving an input signal andproviding a bias-enabling signal having an enabling level when an inputsignal is on" and a disabling level when said input signal is off; afirst transistor having a first emitter coupled to a load; a secondtransistor having its emitter coupled to said load and to said firsttransistor and protection means electronically coupled to saidtransistor means and to said first and second transistors saidprotection means operative whenever current is supplied through saidfirst emitter to said load for establishing a forward bias for saidsecond transistor such that the occurrence of a fault which pulls theoutput voltage at said first emitter below said forward bias will causethe conduction of said second transistor and cut off conduction throughsaid first transistor.

5. In combination with a logic driver system wherein an on" level of aninput signal is employed to cause conduction of an emitter-follower linedriver thereby passing current to a load, and the of "level of the inputsignal is employed to cut off conduction of said line driver, anoverload protection circuit for cutting off current conduction throughsaid line driver only after current is passed through said line driverand the voltage across said load falls below a predetermined fault levelcomprising:

a. first means for receiving said input signals and producing abias-enabling signal having an enabling level when said input signal ison and a disabling level when said input signal is off";

b. a first transistor having a first emitter electrically coupled to aload;

c. a second transistor having its emitter electrically coupled to saidload and to said first transistor; and

d. protection means electrically coupled to said first means and to saidfirst and second transistor, said protection means operative whenevercurrent is supplied through said first emitter to said load for establising a forward bias for said second transistor such that the occurrenceof a fault which pulls the output voltage at said first emitter belowsaid forward bias will cause the conduction of said second transistorand cut off conduction through said first transistor, and wherein saidprotection means includes a first circuit responsive to said on inputsignal to develop a preliminary bias signal, and a second circuitresponsive to said preliminary bias signal for producing said forwardbias after a predetermined delay sufficient to insure that current isfirst supplied to said load.

6. The combination defined in claim 5 wherein said protection meansincludes a direct coupling between said first transistor and a thirdtransistor such that whenever current is supplied through said firsttransistor said third transistor is caused to generate a signalrepresenting said forward bias.

7. The combination defined in claim 5 wherein said protection meansincludes an enabling-bias circuit for producing a signal E having adisabling level when said first transistor is nonconducting and havingan enabling level when said first transistor is conducting.

8. The combination defined in claim 7 wherein said enabling-bias circuitincludes at least one diode or equivalent thereof, and one transistor.

9. The combination defined in claim 7 wherein said enabling-bias circuitis comprised substantially of semiconductor devices.

10. A logic driver for supplying current to a load in response to aninput signal I, the current-present condition of said driver beingrepresented by signal D, said logic driver comprising: isolation meansfor receiving an input signal I and producing output signal I; bias andenabling means for receiving a signal corresponding to signal I andproducing an ena-, ble-disable signal E; a protection stage forreceiving signal E and producing a protection control signal P, saidprotection stage having an output circuit coupled to the output circuitof said driver; and means responsive to a fault condition represented byF and to enable-disable signal E for cutting off current conductionthrough said logic driver, the interconnections and circuits in each ofthe aforementioned means being specifically mechanized according to thefollowing logical definition to cut off current flow through the driverin the event of a fault condition represented by the on" state ofcondition F:

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3599O42Dated gu t 10, 1971 Inventor(s) John R. Andrews, JI'.

It is certified that error appears in the above-identified patent andthat said Letters Patent are hereby corrected as shown below:

On the cover sheet in the Abstract line 9 "sense" should read causeSigned and sealed this 29th day of August 1972.

(SEAL) Attest:

EDWARD M.FLETCHER,JR. ROBERT GOTTSCHALK Attesting Officer Commissionerof Patents RM P0-\OS0 (10-69) USCOMM-DC 60376-P69 U 5 GOVERNMENTPRINTING nrnrr loin 0-1 u

2. In a logic driver system wherein an ''''on'''' level of an inputsignal is employed to cause conduction of an emitter-follower linedriver thereby passing current to a load, and the ''''off'''' level ofthe input signal is employed to cut off conduction of said line driver,an overload protection circuit for cutting off current conductionthrough said line driver only after current is passed through said linedrivEr and the voltage across said load falls below a predeterminedfault level, said protection circuit comprising transistor means forreceiving said input signal and producing a bias-enabling signal havingan enabling level when said input signal is ''''on'''' and a disablinglevel when said input signal is ''''off''''; and second means having aninput circuit for receiving said bias-enabling signal, an output circuitcoupled to said load, and a control circuit coupled to said line driver;the enabling level of said bias-enabling signal being selected to exceedsaid fault level by an amount sufficient to forward bias said secondmeans upon occurrence of a fault and said control circuit beingoperative to terminate conduction through said line driver.
 3. Animproved line driver comprising: a logic signal input circuit; an outputstage for providing a low impedance path for current flow to a load inresponse to an ''''on'''' condition of said logic signal; an enablingdevice including circuits for establishing an enabling signal having apredetermined bias level only when said output stage is supplyingcurrent to said load; and a protection device responsive to saidenabling signal for shunting excessive current away from said outputstage upon occurrence of a fault which pulls the voltage across saidload to a level below said predetermined bias level.
 4. In combination:transistor means for receiving an input signal and providing abias-enabling signal having an enabling level when an input signal is''''on'''' and a disabling level when said input signal is ''''off'''';a first transistor having a first emitter coupled to a load; a secondtransistor having its emitter coupled to said load and to said firsttransistor and protection means electronically coupled to saidtransistor means and to said first and second transistors saidprotection means operative whenever current is supplied through saidfirst emitter to said load for establishing a forward bias for saidsecond transistor such that the occurrence of a fault which pulls theoutput voltage at said first emitter below said forward bias will causethe conduction of said second transistor and cut off conduction throughsaid first transistor.
 5. In combination with a logic driver systemwherein an ''''on'''' level of an input signal is employed to causeconduction of an emitter-follower line driver thereby passing current toa load, and the ''''off'''' level of the input signal is employed to cutoff conduction of said line driver, an overload protection circuit forcutting off current conduction through said line driver only aftercurrent is passed through said line driver and the voltage across saidload falls below a predetermined fault level comprising: a. first meansfor receiving said input signals and producing a bias-enabling signalhaving an enabling level when said input signal is ''''on'''' and adisabling level when said input signal is ''''off''''; b. a firsttransistor having a first emitter electrically coupled to a load; c. asecond transistor having its emitter electrically coupled to said loadand to said first transistor; and d. protection means electricallycoupled to said first means and to said first and second transistor,said protection means operative whenever current is supplied throughsaid first emitter to said load for establishing a forward bias for saidsecond transistor such that the occurrence of a fault which pulls theoutput voltage at said first emitter below said forward bias will causethe conduction of said second transistor and cut off conduction throughsaid first transistor, and wherein said protection means includes afirst circuit responsive to said ''''on'''' input signal to develop apreliminary bias signal, and a second circuit responsive to saidpreliminary bias signal for producing said forward bias after apredetermined delay sufficient to insure that current is first suppliedto said load.
 6. The combination defined in claim 5 wherein saidprotection means includes a direct coupling between said firsttransistor and a third transistor such that whenever current is suppliedthrough said first transistor said third transistor is caused togenerate a signal representing said forward bias.
 7. The combinationdefined in claim 5 wherein said protection means includes anenabling-bias circuit for producing a signal E having a disabling levelwhen said first transistor is nonconducting and having an enabling levelwhen said first transistor is conducting.
 8. The combination defined inclaim 7 wherein said enabling-bias circuit includes at least one diodeor equivalent thereof, and one transistor.
 9. The combination defined inclaim 7 wherein said enabling-bias circuit is comprised substantially ofsemiconductor devices.
 10. A logic driver for supplying current to aload in response to an input signal I, the current-present condition ofsaid driver being represented by signal D, said logic driver comprising:isolation means for receiving an input signal I'' and producing outputsignal I; bias and enabling means for receiving a signal correspondingto signal I'' and producing an enable-disable signal E; a protectionstage for receiving signal E and producing a protection control signalP, said protection stage having an output circuit coupled to the outputcircuit of said driver; and means responsive to a fault conditionrepresented by F and to enable-disable signal E for cutting off currentconduction through said logic driver, the interconnections and circuitsin each of the aforementioned means being specifically mechanizedaccording to the following logical definition to cut off current flowthrough the driver in the event of a fault condition represented by the''''on'''' state of condition F: